Memory Test Handler

The DRAM Test Sorting Handler is specifically designed for testing and classifying Dynamic Random Access Memory (DRAM). This equipment performs comprehensive checks on DRAM to ensure it meets strict standards for efficient operation and stability.

  • SPD handler
  • LO-DIMM/SO DIMM/VLP
  • 15 Dut

  • Low Power DDR3
  • Temp.(Tc) Ambient~125℃
  • 120 Dut

  • LPDDR/UFS/EMMC
  • Temp.(Tc) -50~130℃
  • 32 Dut